Signal Integrity-EMC JumpStart
..One Day including
Hands On Lab
...Overview of Class.
here to down load .pdf class description)
Signal Integrity - EMC Jump Start 3.0 is a methodology
class that walks the student through all of the critical
steps necessary to guarantee first time high speed design
success. Following the Jump Start method results in
solid, reliable designs that are quiet enough to pass
FCC and CISPR tests on the first try. The method was
originally developed by a major telecom company and
has been documented to result in first time success
over 99% of the time. The class includes multiple hands
on lab sessions using power deliver design tools and
industry standard simulation tools for predicting ringing,
cross talk and radiated EMI. In essence the student
performs a hypothetical consulting project from the
start to the finish.
Designers need to predict the effect of critical layout
decisions in order to make a high speed digital system
Theses decisions include:
* Layer Stack-up
* Routing Topology & Termination
* Trace Width and Space Width as a function of layer
* Power Delivery Design, By-pass Capacitor Selection,
Placement, and Connection
* Component Selection and Placement
* Multiple or Split Power / Ground Plane Strategies
Of the 7 items listed, at least 5, and arguably all
7 of those items must be analyzed and specified prior
to beginning layout. Jump Start III teaches the student
how to analyze the design and make rational decisions
that will result in a right the first time design.
This course is appropriate for Electrical Engineers,
EMC Engineers, and Senior PCB Designers who are critically
interested in getting the design right the first time.
A core emphasis is preventing EMI problems. This class
is for design teams who need to “get
it right the first time” "Getting
it Right" means producing high quality reliable
designs that display excellent manufacturing yield,
a low warranty return rate, and pass FCC / CISPR radiated
emissions tests on the first try. It is purposely designed
as a single day course so the student can walk away
with the proper global understanding about how the pieces
of the problem interrelate. We limit the discussion
to CMOS technology in order to make the class move faster.
In order to get all of the material into the single
day format, students must down load and view the video
book tutorial that includes all of the foundational
material for this class. Even if you do not take the
class, I invite you to down load and view the tutorial.
It includes a lot of excellent SI / EMC material. It
is organized in a fashion that allows the student to
pick and choose the chapters of interest. (Down
load 37Mb version of video book)
We specifically address the
Jump Start 3.0 Class Topics Include
How to analyze PC board stack-up?
A board stack-up has two main functions. First, it provides
controlled impedance layer pairs for routing the high
speed signals. Secondly, it is the only source of the
high quality low inductance capacitance which is necessary
to bypass the higher frequency components of the driver
current. If the stack-up is inadequate for the frequencies
involved, the odds of making the design work reliably
and also pass regulatory tests become quite remote.
How to design a power deliver system?
A typical 32 bit power delivery system must be capable
of supplying impulse current of nearly an amp with frequency
components extending above 1 gHz. It is critical to
understand how power supplies, bulk capacitors, chip
capacitors, embedded capacitance combine to provide
a low impedance power deliver system. A poor bypass
capacitor strategy can result in both faulty data and
/ or the radiated emissions which can prevent you from
shipping and otherwise fully functional product. Crowding
identical capacitors into a small region (like directly
under a BGA) can result in power delivery impedance
poles. Key issue….If the bypass capacitor strategy
works, ground bounce is reduced, common mode noise is
reduced, cross talk is reduced, and EMI is reduced..
In essence we teach a rational process to design a power
deliver system which will meet a specific set of design
How to route High Speed Digital Signals
High Speed Digital Signals behave like RF or Microwave
signals. Attempting to route these traces without understanding
the correct routing techniques can result in a host
of problems. These include faulty data, poor manufacturing
yield, hogh warranty return rate, and failing FCC &
CISPR regulatory tests. Ringing can actually burn out
a circuit. The student must be acutely aware of the
return current path. This may require additional components
simply to provide a proper path for the return current.
With out proper attention to return current paths, signal
integrity tools can and will give and overly optimistic
predictions of the circuit performance.
Understanding Clock and Buss Topology and Termination
Clocks must provide clean monotonic edges and minimum
skew for the rest of the system to work properly. Busses
must settle below the specified noise margin before
the set up time and remain below that level through
the hold time. The student will learn how to analyze
a variety of common problems which must be solved through
the proper use of routing topology and signal termination.
Understanding the Jump Start Method
The Jump Start method means planning for success and
then performing the critical acts necessary to guarantee
that success. The basic steps are as follows:
* A. Triage the signals and set budgets for timing,
SI, and EMI.
* B. Design a layer stack up and power delivery system
which can support those targets
* C. Analyze each signal type and derive layout rules
that will enable that signal type to meet the budget.
Here we are taking a detailed look at ringing, cross
talk, EMI, and ground bounce. We must analyze routing
topology and termination to assure that the design rules
given to the layout designer will result in a viable
* D. Route the board and perform an “as built”
simulation to verify that the layout will meet budgeted
* E. Perform an exhaustive cross talk analysis of the
finished “as built” design to make sure
energy from a high speed signal is not being coupled
on to status type signal causing it to become an unwanted
source of EMI or of functional errors.
Applying the Jump Start Method to 8 or more
The 8 layer board is our friend. It provides sufficient
layers to make the analysis for success very straight
forward. There are two high speed routing pairs with
a nice power ground sandwich (ie..a high quality low
inductance capacitor) in the middle. This is the stack-up
for minimum design time and maximum guaranteed results.
Applying the Jump Start Method to 6 layer boards.
Six layer boards offer good high speed routing pairs,
but sacrifice the power ground sandwich. Hence, six
layer boards require careful power deliver system attention
or they can fail in a number of aggravating ways.
Applying the Jump Start Method to 4 layer boards.
The 4 layer board has all of the power deliver problems
of the six layer board. In addition, every routing via
must be analyzed to determine where the return current
for each high speed signal is flowing. Incorrectly analyzing
even one signal can result in either functional or regulatory
Applying the Jump Start Method to 2 layer boards
Two layer boards are the worst of all worlds. We will
address how one synthesizes a power delivery structure
and return current plane to support modest digital system.
Understanding EMI generation in the light of
common design trade-off’s
This section specifically addresses EMI as a primary
topic while surveying all of the design decisions on
a global basis.
Strategies for Dealing with Multiple Power Supplies
Almost every design has multiple power supplies. The
student will learn how to address this issue in the
light of high speed signal requirements.
Strategies for dealing with mixed Analogue and Digital
Note 1: Due to the amount of material to be covered
in this class, the student must view the video prior
to attending the class. This assures the instructor
that everyone is using a common terminology and has
a common baseline of knowledge from which to build.
The class introduction video is available to anyone
who wishes to down load and view it. (Down
load 37Mb version of video book)
Note 2: We supply laptop computers for the labs in
the class. These machines have laptop type mouse pads.
Any student who does not like that type of mouse is
invited to bring their own USB type mouse to class.
Note 3: We offer an optional post class open book test
for any who wish to receive a certificate of accomplishment.
Anyone wishing to take the test must email firstname.lastname@example.org.
Once the test is returned and graded, the student will
receive both a .pdf version of the certificate via email
and a physical certificate via snail mail. This process
generally takes a couple of weeks unless special arrangements
TFox & Associates Teaching
Philosophy ...Explain, Demonstrate, Do
1. Explain the problem in a straight forward manner
so students get insight into the nature of the mechanisms
which need to be controlled.
2. Demonstrate all of the steps necessary to solve the
problem, front to back, just like it is done on a standard
3. Do it...The students will break up into 3 person
teams and work through a design problem themselves.
If the student understands everything that was presented
earlier in the day, this will be relatively easy. If
the student does not understand it, they will have an
opportunity to clarify the methods before they leave
JumpStart III method check list.
for this class, click here . You can also use this
registration page to request information on future classes
or Advanced / On Site Classes.
Down load full fidelity 1024 x 769 quality video &
telephone quality audio version of SIEMC JumpStart V3
Pre-Class Homework. Down load the30 Mb file, unZIP it
into any directory and click the big purple ball to open
the video book and view the table of contents.