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Welcome..


Signal Integrity, Power Integrity, EMC Pro Tune Up 5 <-- This is the current version of my publicly scheduled class

Pro Tune Up 5 is a Signal Integrity, Power Integrity, EMI control, and "make the analog and digital play nice together" class that gives students a well rounded explanation of proper high speed system design. 

The single day class follows a design methodology developed by a major telecommunications company which has been documented over multiple years and thousands of designs to produce “right the first time” results 99% of the time.   The class is suitable for engineers, layout designers, EMI engineers, and engineering managers. 

There are no prerequisites other than watching the relatively extensive pre-class homework videos. Beyond that, anyone having a sincere desire to become proficient at building high speed digital and mixed analogue-digital systems will do fine in the class.

After the class you will have temporary access to Mentor's HyperLynx simulator in order to go through the post-class labs. This class is a very serious high speed design methodology class that would normally be taught in a three day format. By utilizing extensive pre-class videos and post class labs, I am able to configure it into a single "face to face" day of training.

“Right the first time” means a typical system comprised of DDR3 memory, PCI Express channels, low level analog, and RF work correctly at full speed, they are reliable, they have clearly defined manufacturing margins, and they are quiet enough to pass FCC & CISPR radiated emissions tests….on the first try!

The class is presented in a single day format and includes a number of real world hands on labs, etc. Computers & SI tools are provided..

...more info on SI EMC Pro Tune Up 5 class... or ...Class Schedule...

(....Click here to down load the class introduction video, but beware, it is about 37Mb)

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Signal Integrity, Power Integrity, EMC Project Implementation

Project Implementation is a 3 day class that covers all of the material in Pro Tune Up 5 as well as some project specific consulting. The class is in essence a project launch exercise where you define the project. Two days are spent going through the process and addressing specific common modern day design challenges. The third day is spent working through a specific design. This can be the students design or a canned class design. The student must work all of the steps and provide the information for peer review as would be done in a normal pre-layout design review. Key elements of the review will include predicting design margins for noise, critical timing loops, and radiated EMI. This class is commonly used as a substitute for consulting. The student can work on their own design and pose critical questions to the class for comment. Computers & SI tools are provided..

...more info on SI EMC Project Implementation class... or ...Class Schedule...

(....Click here to down load the class introduction video, but beware, it is about 37Mb)

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Signal Integrity, Power Integrity, EMI Control Project Consulting

Disaster Recovery is for those who have built a system and you want me to fix it. When your product will not work at full speed, it is a design disaster. When you can not achieve a reasonable manufacturing yield, it is a manufacturing disaster. When you have a working product that can not pass FCC /CISPR tests, you have a certification disaster. All of these cases result in a financial disaster. Engaging in this manner generally implies going on site until it is fixed. Disaster Recovery is 1 board, 1 week, $15-25K, guaranteed to work properly from an SI stand point and pass FCC / CISPR radiated EMI tests. I will generate the specs for the next board layout. Once the layout is completed I will review the design and simulate the critical nets. I will continue to support the project until you are satisfied that everything is working properly and you have passed FCC / CISPR tests.

Coaching is designed for those who have taken the Pro Tune Up class and are familiar with the method. Coaching takes a minimum of my time and only requires that I come on site if you would like a design review or kick off session. Hence it is very inexpensive ie $3,000 to $7,500 for the entire project. The notion is that you do the bulk of the work and I will perform the sanity checks necessary to make sure you are doing everything correctly. This is similar to a term paper or senior project scenario. I will make sure you understand the requirements and then I will review your work to make sure you will get the "right the first time results." If you wish I will also participate in the Pre-Layout and Post-Layout / Pre-Fabrication formal design reviews.

Complete Project Design service is designed for those who want me to do the entire job. Generally this is a fixed fee in the range of $15-25K depending upon the complexity of the design.

 

Note*** The guarantee of first time success has a few weasel words. First, it depends upon well behaved chips. This methodology can not see inside the device package and is therefore dependent upon chip manufacturers doing their job correctly. In the case of a suspect device, we can institute defensive measures that will mitigate the problem, but with a bad chip, knowing how much mitigation is enough can be very tricky. Second, descent clocks are mandatory. Tight DDR 3 timing is impossible without rock solid clocks. Third, some high efficiency DC-DC converters can be extremely noisy. I know a few tricks, but this is really the domain of a good analog designer to get these things to calm down.

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Our Signal Integrity / EMC Philosophy ...build it right the first time..
Modern high speed digital ( & mixed analogue, digital, RF ) systems can be built to work right the first time with very little additional effort. Typically the design time is extended by a week or two in order to allow time for proper design and reviews. The result is a solid, reliable design that is also quiet enough to pass FCC / CISPR tests. Flaky boards that won't run at full speed, software / hardware wars, poor manufacturing yield, high warranty return cost, and FCC / CISPR test failure can be a thing of the past. It is only a matter of proper engineering discipline. ...more info...

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Terry Fox & Associates, www.siemc.com, Tel 425 391-8696 Fax 425 392-1826

1420 Gilman Blvd NW, Suite 2-2128, Issaquah, WA 98027

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